Introduction to ARM Cortex M3 and M4 Processors
Free Courses : Introduction to ARM Cortex M3 and M4 Processors
Hi all! Welcome to my course on 'Introduction to ARM Cortex M3 and M4 Processors'. This course will help you gain knowledge in the architecture, registers, features of ARM Cortex Processors. The other half of the course will help you understand the instruction set of ARM Cortex-M so that you'll be able to write programs in assembly language.
The Architecture part covers
1. Features of ARM Processors.
2. Versions of ARM
3. Applications of ARM Cortex-M
4. Specific Features of ARM Cortex.
5. Three stage pipeline of Cortex.
6. Registers - General Purpose, Special Purpose in ARM Cortex M3
7. Memory Features.
8. Bit Band Region.
9. Little Endian, Big Endian Architecture.
10. The Thumb-2 Technology
11. Difference between ARM and Thumb Instructions in Classical ARM Processors.
12. Stack Memory
13. Interrupts/Exceptions
14. Interrupt Masking
The Instruction set part covers
Moving data within the processor
Memory accesses
Arithmetic operations
Logic operations
Shift and Rotate operations
Conversion (extend and reverse ordering) operations
Bit field processing instructions
Program flow control (branch, conditional branch, conditional execution, and
function calls)
Multiply accumulate (MAC) instructions
Divide instructions
Memory barrier instructions
Exception-related instructions
Sleep mode-related instructions
Other functions
What are you waiting for? I'll see you there in my course.
The Cortex-M3 and Cortex-M4 are processors designed by ARM. The Cortex-M3 processor was the first of the Cortex generation of processors, released by ARM in 2005 (silicon products released in 2006).
The Cortex-M4 processor was released in 2010 (released products also in 2010). The Cortex-M3 and Cortex-M4 processors use a 32-bit architecture. Internal registers in the register bank, the data path, and the bus interfaces are all 32 bits wide. The Instruction Set Architecture (ISA) in the Cortex-M processors is called the Thumb ISA and is based on Thumb-2 Technology which supports a mixture of 16-bit and 32-bit instructions
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